BS EN 61523-2-2002 延迟计算和功率计算标准.CMOS集成电路子程序库.预布局延迟计算规范
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【英文标准名称】:Delayandpowercalculationstandards-Pre-layoutdelaycalculationspecificationforCMOSASIClibraries
【原文标准名称】:延迟计算和功率计算标准.CMOS集成电路子程序库.预布局延迟计算规范
【标准号】:BSEN61523-2-2002
【标准状态】:现行
【国别】:英国
【发布日期】:2002-09-27
【实施或试行日期】:2002-09-27
【发布单位】:英国标准学会(BSI)
【起草单位】:BSI
【标准类型】:()
【标准水平】:()
【中文主题词】:集成电路;延迟时间;规范;延迟电路;集成存储器电路;电气工程;半导体器件;芯片;集成电路工艺;计算机控制
【英文主题词】:Chips;Computerizedcontrol;Definition;Definitions;Delaycircuits;Delaytime;Designcalculations;Electricalengineering;Integratedcircuittechnology;Integratedcircuits;Integratedmemorycircuits;Semiconductordevices;Specification
【摘要】:Thisstandardspecifiesthepre-layoutdelaycalculationmethodforCMOS1ASICLibrarieswhichcontainscellbasedprimitivesandmemoriestobeusedduringthepre-layoutdesignphaseofLogicsimulation,Timingverfication,andLogicsynthesis.Thedelaycalculationmethodaddressedinthisstandardconsistsof1)Estimationofwirecapacitanceand2)Delaycalculationmethodbasedontablelook-up.WithuseofDCLandSDF,thisdelaycalculationmethodhelpstheuserhaveaunifiedtimingmodelforvariousEDAtoolsinthepre-layoutdesignphase.Thisstandardisconsistentwithexistingstandardsandacceptsexistingstandardformats,likeSPEF,DCL,andSDF.ScopeofthisstandardcoverstheCMOSASICfrontendtimingdesignforusinglogicsynthesizer,simulators,timingverifiers.Thedelaycalculationmethodspecifiedisbasedontheinputslewratecalculationstepandtheporttoportcalculationstep.Duringthesecalculationsteps,thetablelookupmethodisused.Thetablemethodofthisstandardspecifiestwointerpolationmethodsfordelaycalculation.Oneisbi-linearinterpolationwhichiswidelyusedthroughtheindustry.Anotherisalinearinterpolationusingneighboring3points.Thenatureofthedelayvaluehasmonotonouslyincreasingfunctionofconvexsurface.ThislinearinterpolationhasafewpercentofdifferencesbetweenlinearinterpolationandSPICEresult.
【中国标准分类号】:L56
【国际标准分类号】:31_200
【页数】:42P;A4
【正文语种】:英语
【原文标准名称】:延迟计算和功率计算标准.CMOS集成电路子程序库.预布局延迟计算规范
【标准号】:BSEN61523-2-2002
【标准状态】:现行
【国别】:英国
【发布日期】:2002-09-27
【实施或试行日期】:2002-09-27
【发布单位】:英国标准学会(BSI)
【起草单位】:BSI
【标准类型】:()
【标准水平】:()
【中文主题词】:集成电路;延迟时间;规范;延迟电路;集成存储器电路;电气工程;半导体器件;芯片;集成电路工艺;计算机控制
【英文主题词】:Chips;Computerizedcontrol;Definition;Definitions;Delaycircuits;Delaytime;Designcalculations;Electricalengineering;Integratedcircuittechnology;Integratedcircuits;Integratedmemorycircuits;Semiconductordevices;Specification
【摘要】:Thisstandardspecifiesthepre-layoutdelaycalculationmethodforCMOS1ASICLibrarieswhichcontainscellbasedprimitivesandmemoriestobeusedduringthepre-layoutdesignphaseofLogicsimulation,Timingverfication,andLogicsynthesis.Thedelaycalculationmethodaddressedinthisstandardconsistsof1)Estimationofwirecapacitanceand2)Delaycalculationmethodbasedontablelook-up.WithuseofDCLandSDF,thisdelaycalculationmethodhelpstheuserhaveaunifiedtimingmodelforvariousEDAtoolsinthepre-layoutdesignphase.Thisstandardisconsistentwithexistingstandardsandacceptsexistingstandardformats,likeSPEF,DCL,andSDF.ScopeofthisstandardcoverstheCMOSASICfrontendtimingdesignforusinglogicsynthesizer,simulators,timingverifiers.Thedelaycalculationmethodspecifiedisbasedontheinputslewratecalculationstepandtheporttoportcalculationstep.Duringthesecalculationsteps,thetablelookupmethodisused.Thetablemethodofthisstandardspecifiestwointerpolationmethodsfordelaycalculation.Oneisbi-linearinterpolationwhichiswidelyusedthroughtheindustry.Anotherisalinearinterpolationusingneighboring3points.Thenatureofthedelayvaluehasmonotonouslyincreasingfunctionofconvexsurface.ThislinearinterpolationhasafewpercentofdifferencesbetweenlinearinterpolationandSPICEresult.
【中国标准分类号】:L56
【国际标准分类号】:31_200
【页数】:42P;A4
【正文语种】:英语
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